COMPUTER ORGANIZATION II B.Tech II Semester (R07) Regular/supply Examinations, Apr- 2010

Code No: V0522
  II B.Tech II Semester (R07) Regular/supply                                    Examinations, Apr- 2010
                   COMPUTER ORGANIZATION
                   (Common to CSE, IT, ECC, ICE)
Time: 3 Hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
1. a) List and explain different interconnection structures used in multiprocessors?
b) Perform the arithmetic operations (+42)+(-13) and (-42)-(-13) in binary using
2’s complement representation for negative numbers. (8+8M)
2. a) Explain how Z = (X-Y) / (X+Y) is evaluated in a stack based computer.
b) Explain the properties of Reduced Instruction Set Computers. (8+8M)
3. What are the design goals while designing the Control Unit? Explain the Hardwired
control and Micro programmed control. Mention their advantages and
disadvantages. (16M)
4. a) Explain Booth’s algorithm from its theoretical basis.
b) Multiply 10101 with 10011 using Booth’s algorithm. (8+8M)
5. Explain the following memories with their applications.
a) ROM
b) PROM
c) EPROM
d) EEPROM (4+4+4+4M)
6. List and explain different I/O communication techniques. Also mention their
advantages and disadvantages. (16M)
7. a) What is meant by pipelining? Explain.
b) Explain the following with related to the instruction pipeline
i) . Pipeline conflicts
ii). Hardware interlocks
iii). Pre-fetch target instruction
iv). Branch target buffer (8+8M)
8. a) Explain the characteristics of multiprocessors.
b) Explain the need for interprocessor synchronization. (8+8M)

Code No: V0522
II B.Tech II Semester (R07) Regular/supply Examinations, Apr- 2010
COMPUTER ORGANIZATION
(Common to CSE, IT, ECC, ICE)
Time: 3 Hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
1. a) Explain about various buses such as internal, external, I/O, system, address and
data bus.
b) Perform the arithmetic operations (+70)+(+80) and (-70)+(-80) in binary using
2’s complement representation for negative numbers. (10+6M)
2. Write short notes on the following:
a) Register transfer language
b) Instruction formats
c) Addressing modes
d) Reduced Instruction Set Computer (4+4+4+4M)
3. a) Explain why hardwired control unit is faster than micro programmed control unit.
b) What are micro-subroutines? Explain. (8+8M)
4. a) Draw a flow chart which explains multiplication of two signed magnitude fixed
point numbers.
b) Multiply 10101 and 10111 with the above procedure. (8+8M)
5. What is Cache memory? Explain the different mapping techniques used in the
usage of Cache memory. (16M)
6. What is Direct Memory Access (DMA)? What is the need for DMA? Explain the
working of DMA. Also mention its advantages. (16M)
7. a) What is meant by instruction pipeline? Explain
b) Explain the pipeline for floating point addition and subtraction. (8+8M)
8. a) List and explain different interconnection structures used in multiprocessors?
b) Explain system bus structure for multiprocessors with a neat sketch.
(8+8M)

Code No: V0522
II B.Tech II Semester (R07) Regular/supply Examinations, Apr- 2010
COMPUTER ORGANIZATION
(Common to CSE, IT, ECC, ICE)
Time: 3 Hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
1. a) List and explain different types of computers with examples. Also mention their
merits and demerits.
b) What is meant by odd parity and even parity?
c) Distinguish between error detection and correction codes. (8+3+5M)
2. What is Register Transfer Language? Explain few RTL statements for branching
from their actual functioning. (16M)
3. Define and explain the following
a) Micro operation
b) Microinstruction
c) Micro program
d) Microcode (4+4+4+4M)
4. a) How many bits are needed to store the result of addition, subtraction,
multiplication of two n-bit unsigned numbers? Prove.
b) What is overflow and underflow? What are the reasons for overflow and
underflow? (8+8M)
5. With suitable examples, explain two-way set associative mapping and four-way set
associative mapping. (16M)
6. Explain the following
a) Input-Output Processor
b) Direct Memory Access
c) Interconnected (PCI) bus (6+5+5M)
7. a) What is meant by arithmetic pipeline? Explain.
b) Explain about three segment instruction pipeline. (8+8M)
8. a) Explain multi port memory organization with a neat sketch.
b) What is cache coherence? Explain its importance. (8+8M)

Code No: V0522
II B.Tech II Semester (R07) Regular/supply Examinations, Apr- 2010
COMPUTER ORGANIZATION
(Common to CSE, IT, ECC, ICE)
Time: 3 Hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
1. a) List and explain different performance measures used to represent a computer
system performance.
b) Explain about sign magnitude and 2’s complement approaches for representing
the fixed point numbers. Explain why 2’s complement approach is preferable.
(8+8M)
2. a) List and explain few arithmetic, logic and shift micro operations.
b) What is an interrupt? Explain different types of interrupts. (8+8M)
3. a) Explain the difference between hardwired control and micro programmed
control. Is it possible to have a hardwired control associated with a central memory?
b) What is microinstruction? How do we reduce number of microinstructions?
(8+8M)
4. With neat flowcharts and examples, explain how two IEEE 754 flowing point
numbers can be added, subtracted and multiplied. Assume single precision
numbers. (16M)
5. a) Compare and contrast asynchronous DRAM and synchronous DRAM.
b) Compare and contrast direct and associative mapping techniques.
(8+8M)
6. Explain different standard serial communication protocols like RS232, USB, IEEE
1394. (16M)
7. Explain the flowing
a) RISC pipeline
b) Vector processing
c) Array processor (6+5+5M)
8. What is cache coherence? Explain its importance in shared memory multiprocessor
systems? (16M)